1. Field of the Invention
The present invention relates to a thin-film transistor formed by sequentially stacking thin films on an insulating substrate, and a thin-film transistor array for a liquid crystal display element, in which thin-film transistors, pixel electrodes connected to the thin-film transistors, and conductive lines for controlling the thin-film transistors are arranged.
2. Description of the Related Art
Liquid crystal display devices are widely used for the displays of personal computers, portable television sets, and the like. As such liquid crystal display devices, simple matrix type liquid crystal elements such as a twisted nematic liquid crystal element (TN-LCD) and a super-twisted nematic liquid crystal element (STN-LCD) are used.
A TN-LCD is advantageous in a simple structure and hence can be easily manufactured. However, since the contrast of the TN-LCD deteriorates as the time division count is increased, a high-resolution or large-screen liquid crystal display device cannot be obtained.
An STN-LCD allows time-division driving with a large time division count. However, since the response speed of the STN-LCD is low, actually displayed images cannot follow changes in images to be displayed, resulting in picture rolling. Therefore, clear display cannot be performed.
In order to solve this problem, an active matrix type liquid crystal element (TFT-LCD) has been developed. In this liquid crystal element, thin-film transistors (TFT), each formed by stacking thin films, are respectively connected to pixel electrodes arranged in a matrix so that the transmittance of each pixel of the liquid crystal element is controlled by controlling a corresponding one of the thin-film transistors.
In this TFT-LCD structure, a thin-film transistor array (TFT panel), in which pixel electrodes, TFTs, and two types of conductive lines for controlling the TFTs and supplying data signals thereto are mounted on an insulating substrate, and an opposing substrate having opposing electrodes formed thereon are arranged to oppose each other with a predetermined gap, and a liquid crystal material is sealed in this gap.
As the above-described TFTs, a stagger type transistor, an inverse stagger type transistor, a coplanar type transistor, an inverse coplanar type transistor, and the like are known. Of these TFTs, the structure of an inverse stagger type TFT will be described in detail below with reference to FIG. 1.
This thin-film transistor comprises a gate electrode 2 formed on an insulating substrate 1 consisting of glass or the like, a gate insulating film 3 covering the gate electrode 2, an i-type semiconductor layer 4 formed on the gate insulating film 3 to oppose the gate electrode 2, and source and drain electrodes 6s and 6d formed on two sides of the i-type semiconductor layer 4 through an n-type semiconductor layer 5.
A blocking insulating film 7 is formed on the channel region of the i-type semiconductor layer 4 to prevent the surface of the i-type semiconductor layer 4 from being etched when a portion of, the n-type semiconductor layer 5, corresponding to the channel region is removed by etching.
The TFT is manufactured in the following steps.
In the first step, a metal film is formed on the substrate 1, and the metal film is patterned by photolithography to form the gate electrode 2.
In the next step, the gate insulating film 3, the i-type semiconductor layer 4, and the blocking insulating film 1 are sequentially formed on the substrate 1, on which the gate electrode 2 has already been formed. The blocking insulating film 7 and the i-type semiconductor layer 4 are patterned by photolithography.
In the subsequent step, the n-type semiconductor layer 5 and a source/drain electrode metal film are sequentially formed on the substrate 1, and the metal film is patterned by photolithography to form the source and drain electrodes 6s and 6d. In addition, the n-type semiconductor layer 5 is removed by etching except for portions under the source and drain electrodes 6s and 6d.
According to the above-described conventional TFT, however, since the gate electrode 2 as a lower electrode is formed by patterning the metal film on the substrate 1 using a photolithographic method, stepped portions, each having a height corresponding to the thickness of the gate electrode 2, are formed at the edge portions of the gate electrode 2, as shown in FIG. 1.
For this reason, in the conventional TFT, the thickness of the gate insulating film 3, which is formed after the gate electrode 2 is formed, is reduced at portions of the transistor element region which correspond to the edge portions of the gate electrode 2, thus decreasing the breakdown voltage at these portions. As a result, short-circuiting tends to occur between the gate electrode 2 and the source and drain electrodes 6s and 6d.
The gate electrode 2 and the source and drain electrodes 6s and 6d of the TFT are generally composed of a metal having a relatively high resistivity, e.g., Ta (tantalum), Ta-Mo (tantalum-molybdenum alloy), or Cr (chromium). Therefore, in order to decrease the resistance of each electrode, its film thickness is preferably increased. However, if the thickness of the gate electrode 2 is increased, the above-mentioned stepped portions are increased in size, and the thickness of the gate insulating film 3 is excessively reduced at portions corresponding to the edge portions of the gate electrode 2, resulting in a further decrease in breakdown voltage.
Such a problem is not limited to the inverse stagger type thin-film transistor but is equally posed in the stagger type, coplanar type, and inverse coplanar type thin-film transistors. In such conventional thin-film transistors, the lower electrode (the source/drain electrode in the stagger and coplanar type; the gate electrode in the inverse coplanar type) under the gate insulating film is formed by patterning the deposited metal film using a photolithographic method. For this reason, the thickness of the gate insulating film is reduced at portions of the transistor element region which correspond to the edge portions of the lower electrode, and the breakdown voltage at these portions is decreased. As a result, short-circuiting tends to occur between the gate electrode and the source and drain electrodes.
Furthermore, in the above-described TFT, since the blocking insulating film 7 is generally composed of the same insulating material as that of the gate insulating film 3, if the i-type semiconductor layer 4 has a pinhole, an etchant which is applied to the blocking insulating film 7 to pattern it reaches the gate insulating film 3 through the pinhole in the i-type semiconductor layer 4. Consequently, the gate insulating film 3 is also etched.
For this reason, in the conventional thin-film transistor described above, a pinhole defect is caused in the gate insulating film 3 in a manufacturing step, and the gate electrode 2 and the source and drain electrodes 6s and 6d are short-circuited through the pinhole.